1. Technical Field
Various embodiments may generally relate to a semiconductor apparatus, and more particularly, to a nonvolatile memory apparatus and a resistance compensation circuit thereof.
2. Related Art
Semiconductor memory apparatuses consist of a plurality of memory cells coupled between a plurality of word lines and a plurality of bit lines.
When an address signal is provided from an external apparatus or a host apparatus, the semiconductor memory apparatus accesses a corresponding memory cell by decoding the address signal through a word line decoder and a bit line decoder.
The word line and the bit line may be, for example, a metal wiring, and a memory cell (remote cell) which is located far away from the word line decoder and the bit line decoder may have a larger resistance than a memory cell (near cell) which is located close to the word line decoder and the bit line decoder.
That is, the resistance of the memory cell is closely related with the word line address and the bit line address.
A write circuit which uses a current source and a read circuit which uses a voltage source may be designed to have large drivability to prevent a write error and a read error due to the large resistance difference between the remote cell and the near cell.
However, as the drivability of the write circuit and the read circuit is increased, the power consumption of the semiconductor memory apparatus is increased.